低成本高吞吐量LDPC译码器的分析与设计

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摘要翻译：
本文介绍了一种低密度奇偶校验(LDPC)译码器的低成本、高吞吐量硬件设计方法。提出的非满射有限字母表迭代译码器（NS-FAIDs）利用了消息传递LDPC译码器对交换消息计算不准确的鲁棒性，为文献中提出的几种设计提供了统一的框架。NS-FAIDs通过密度演化对规则和不规则LDPC码进行了优化，并在硬件复杂度和译码性能之间提供了不同的折衷。提出了两种面向高吞吐量应用的硬件体系结构，集成了最小和(MS)和NS-FAID译码内核。在65nm CMOS工艺上的ASIC后合成实现结果表明，NS-FAIDs的吞吐率与面积比显著提高，比MS解码器提高了58.75%，纠错性能甚至更好或仅略有下降。
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英文标题：
《Analysis and Design of Cost-Effective, High-Throughput LDPC Decoders》
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作者：
Thien Truong Nguyen-Ly, Valentin Savin, Khoa Le, David Declercq,
  Fakhreddine Ghaffari, Oana Boncalo
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最新提交年份：
2017
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分类信息：

一级分类：Electrical Engineering and Systems Science        电气工程与系统科学
二级分类：Signal Processing        信号处理
分类描述：Theory, algorithms, performance analysis and applications of signal and data analysis, including physical modeling, processing, detection and parameter estimation, learning, mining, retrieval, and information extraction. The term "signal" includes speech, audio, sonar, radar, geophysical, physiological, (bio-) medical, image, video, and multimodal natural and man-made signals, including communication signals and data. Topics of interest include: statistical signal processing, spectral estimation and system identification; filter design, adaptive filtering / stochastic learning; (compressive) sampling, sensing, and transform-domain methods including fast algorithms; signal processing for machine learning and machine learning for signal processing applications; in-network and graph signal processing; convex and nonconvex optimization methods for signal processing applications; radar, sonar, and sensor array beamforming and direction finding; communications signal processing; low power, multi-core and system-on-chip signal processing; sensing, communication, analysis and optimization for cyber-physical systems such as power grids and the Internet of Things.
信号和数据分析的理论、算法、性能分析和应用，包括物理建模、处理、检测和参数估计、学习、挖掘、检索和信息提取。“信号”一词包括语音、音频、声纳、雷达、地球物理、生理、（生物）医学、图像、视频和多模态自然和人为信号，包括通信信号和数据。感兴趣的主题包括：统计信号处理、谱估计和系统辨识；滤波器设计；自适应滤波/随机学习；（压缩）采样、传感和变换域方法，包括快速算法；用于机器学习的信号处理和用于信号处理应用的机器学习；网络与图形信号处理；信号处理中的凸和非凸优化方法；雷达、声纳和传感器阵列波束形成和测向；通信信号处理；低功耗、多核、片上系统信号处理；信息物理系统的传感、通信、分析和优化，如电网和物联网。
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一级分类：Computer Science        计算机科学
二级分类：Hardware Architecture        硬件体系结构
分类描述：Covers systems organization and hardware architecture. Roughly includes material in ACM Subject Classes C.0, C.1, and C.5.
涵盖系统组织和硬件架构。大致包括ACM主题课程C.0、C.1和C.5中的材料。
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英文摘要：
  This paper introduces a new approach to cost-effective, high-throughput hardware designs for Low Density Parity Check (LDPC) decoders. The proposed approach, called Non-Surjective Finite Alphabet Iterative Decoders (NS-FAIDs), exploits the robustness of message-passing LDPC decoders to inaccuracies in the calculation of exchanged messages, and it is shown to provide a unified framework for several designs previously proposed in the literature. NS-FAIDs are optimized by density evolution for regular and irregular LDPC codes, and are shown to provide different trade-offs between hardware complexity and decoding performance. Two hardware architectures targeting high-throughput applications are also proposed, integrating both Min-Sum (MS) and NS-FAID decoding kernels. ASIC post synthesis implementation results on 65nm CMOS technology show that NS-FAIDs yield significant improvements in the throughput to area ratio, by up to 58.75% with respect to the MS decoder, with even better or only slightly degraded error correction performance.
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PDF链接：
https://arxiv.org/pdf/1709.10396

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关键词：吞吐量 提供 decoding shown 提出 proposed