Investigations of solder joint damage potentials for board-level
chip-scale packages subjected to consecutive drops
Chang-Lin Yeh, Yi-Shao Lai *
Central Labs, Advanced Semiconductor Engineering, Inc., 26 Chin 3rd Road, Nantze Export Processing Zone, 811 Nantze, Kaohsiung, Taiwan
Received 28 November 2006; received in revised form 19 March 2007
Available online 13 June 2007