[文献] Investigations of solder joint damage potentials for board-level chip-scale pack [推广有奖]

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victorbian

发表于 2020-6-20 23:20:04 |AI写论文

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【作者(必填)】Chang-Lin Yeh

【文题(必填)】Investigations of solder joint damage potentials for board-level chip-scale packages subjected to consecutive drops
【年份(必填)】2008

【全文链接或数据库名称(选填)】https://www.researchgate.net/publication/220455803_Investigations_of_solder_joint_damage_potentials_for_board-level_chip-scale_packages_subjected_to_consecutive_drops

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丘比特之吻查看完整内容

Investigations of solder joint damage potentials for board-level chip-scale packages subjected to consecutive drops Chang-Lin Yeh, Yi-Shao Lai * Central Labs, Advanced Semiconductor Engineering, Inc., 26 Chin 3rd Road, Nantze Export Processing Zone, 811 Nantze, Kaohsiung, Taiwan Received 28 November 2006; received in revised form 19 March 2007 Available online 13 June 2007

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丘比特之吻

发表于 2020-6-20 23:20:05

Investigations of solder joint damage potentials for board-level
chip-scale packages subjected to consecutive drops
Chang-Lin Yeh, Yi-Shao Lai *
Central Labs, Advanced Semiconductor Engineering, Inc., 26 Chin 3rd Road, Nantze Export Processing Zone, 811 Nantze, Kaohsiung, Taiwan
Received 28 November 2006; received in revised form 19 March 2007
Available online 13 June 2007

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