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基于FPGA的多串口模块_通信工程专业论文范文

发布时间:2015-01-24 来源:人大经济论坛
通信工程专业论文 目 录 引言 ………………………………………………………………………………………1 1 设计的目的和任务 …………………………………………………………………2 2 串行通信 ……………………………………………………………………………2 3 设计分析及芯片选型 ……………………………………………………………9 4 UP-TO-DOWN设计 …………………………………………………………………10 5 系统的仿真和综合 ………………………………………………………………20 6 结论 …………………………………………………………………………………25 谢辞 ……………………………………………………………………………………26 参考文献 ………………………………………………………………………………27 附录 ……………………………………………………………………………………28 摘 要 随着计算机系统和微机网络的快速发展,串行通信在数据通信及控制系统中得到广泛的应用。各种新型通用异步串行接收/发送器UART(Universal Asynchronous Receiver Transmitter),它们较好的满足了时下的需求,并且能够实现比较全面的串行通信功能;但是常用UART芯片比较复杂且移植性差,而且在实际应用过程中,我们只需要其部分的功能,因而造成一定的资源浪费。本设计提出一种采用可编程器件FPGA 实现UART 的方法,实现了对UART 的模块化设计方法。最后将UART的核心功能集成到FPGA上,使整体设计紧凑,小巧,实现的UART功能。 本说明书在介绍串行通信、可编程ASIC和VHDL语言之后,着重讨论了如何使用可编程ASIC实现多串口模块,提出了一种专用异步串行通信电路的FPGA实现方法,具体描述了发送、接收、波特率发生模块及接口模块的设计,详细阐述了各个模块的流程、结构与设计细节,并且给出了各个模块及整个系统的仿真结果及分析。该电路根据实际应用中串口复用的要求,扩展四路串口,形成一个多串口模块。这样便充分利用FPGA的资源,提高了设计的灵活性和稳定性,简化了电路、缩小了体积、提高了稳定性,具有更大的灵活性。 关键词:可编程专用集成电路;串行通信;通用异步串口;系统级芯片;IP核。 Abstract Following the rapid develop of the computer system and network,the serial communication is used widely in the data transmission and the control system. Many kind of new-type asynchronous transmitter /receiver,such as PC16550,could satisfy a present need, and can carry out a more overall function of serial communication.but when it came into the practice ,But in common, the UART chips is very complicated and its transplantation is bad,and also we just need the part function of them,so this can be seem to be a resource waste.his design give a new method that using programmable logic device FPGA to realize UART.it carries out the model design for the UART, and Integrate the Core function of UART to the FPGA,make the whole design very well-knit ,little,and the function is so stable and dependable. This thesis emphasize to discuss how to use progammabe ASIC to emulate several-serial-port module, after the introducing of serial communicating ,programmable ASIC and the VHDL language .And a new realizing method which carry out by FPGA is given out for the special use of asynchronous serial data transmission. this thesis has descriptied the details design of transmission module ,receive module ,the origination of baud rate module and the interface module,such as every model ‘s process,structure and the design details , and give each mold piece and the whole system imitate result and analysis.according to the request of serial ports multiplexing in practice, we expand four serial port to get a module of serial ports . All those make good use of a FPGA resources, raise the vivid and stability of design, and simplify electric circuit,reduce physical volume and improve a stability,and have more flexibility. Key words: ASIC ;UART ;SOC;serial communication; IP cores.
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