发帖
雷达卡
摘要翻译：
在信号处理系统的数据流表示中，应用程序被表示为有向图，其中顶点表示计算，边对应于缓冲区，当数据在计算之间传递时，缓冲区存储数据。缓冲区是单输入、单输出组件，以先进先出(FIFO)的方式管理数据。在本文中，我们将数据流缓冲区的概念推广为“被动块”的概念。与数据流缓冲区一样，被动块用于在生产参与者生成数据和消费参与者使用数据之间的间隔时间内存储数据。然而，被动块可以具有多个输入和多个输出，并且可以根据某些约束合并对存储数据的操作和重排。我们定义了一种流图表示形式，它是基于用所提出的被动块的概念替换数据流边缘。我们提出了一种利用这种新形式的信号处理流图的结构化设计方法，并证明了它在提高内存管理效率和执行时间性能方面的作用。
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英文标题：
《Generalized Graph Connections for Dataflow Modeling of DSP Applications》
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作者：
Yanzhou Liu, Lee Barford, Shuvra S. Bhattacharyya
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最新提交年份：
2018
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分类信息：
一级分类：Electrical Engineering and Systems Science 电气工程与系统科学
二级分类：Signal Processing 信号处理
分类描述：Theory, algorithms, performance analysis and applications of signal and data analysis, including physical modeling, processing, detection and parameter estimation, learning, mining, retrieval, and information extraction. The term "signal" includes speech, audio, sonar, radar, geophysical, physiological, (bio-) medical, image, video, and multimodal natural and man-made signals, including communication signals and data. Topics of interest include: statistical signal processing, spectral estimation and system identification; filter design, adaptive filtering / stochastic learning; (compressive) sampling, sensing, and transform-domain methods including fast algorithms; signal processing for machine learning and machine learning for signal processing applications; in-network and graph signal processing; convex and nonconvex optimization methods for signal processing applications; radar, sonar, and sensor array beamforming and direction finding; communications signal processing; low power, multi-core and system-on-chip signal processing; sensing, communication, analysis and optimization for cyber-physical systems such as power grids and the Internet of Things.
信号和数据分析的理论、算法、性能分析和应用，包括物理建模、处理、检测和参数估计、学习、挖掘、检索和信息提取。“信号”一词包括语音、音频、声纳、雷达、地球物理、生理、（生物）医学、图像、视频和多模态自然和人为信号，包括通信信号和数据。感兴趣的主题包括：统计信号处理、谱估计和系统辨识；滤波器设计；自适应滤波/随机学习；（压缩）采样、传感和变换域方法，包括快速算法；用于机器学习的信号处理和用于信号处理应用的机器学习；网络与图形信号处理；信号处理中的凸和非凸优化方法；雷达、声纳和传感器阵列波束形成和测向；通信信号处理；低功耗、多核、片上系统信号处理；信息物理系统的传感、通信、分析和优化，如电网和物联网。
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英文摘要：
In dataflow representations for signal processing systems, applications are represented as directed graphs in which vertices represent computations and edges correspond to buffers that store data as it passes between computations. The buffers are single-input, single-output components that manage data in a first-in, first-out (FIFO) fashion. In this paper, we generalize the concept of dataflow buffers with a concept called "passive blocks". Like dataflow buffers, passive blocks are used to store data during the intervals between its generation by producing actors, and its use by consuming actors. However, passive blocks can have multiple inputs and multiple outputs, and can incorporate operations on and rearrangements of the stored data subject to certain constraints. We define a form of flowgraph representation that is based on replacing dataflow edges with the proposed concept of passive blocks. We present a structured design methodology for utilizing this new form of signal processing flowgraph, and demonstrate its utility in improving memory management efficiency, and execution time performance.
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PDF链接：
https://arxiv.org/pdf/1807.05721
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