发布时间：2014-10-13 来源：人大经济论坛

目 录 摘 要I AbstractII 目 录III 1 前言1 2 8051单片机简介4 2.1 8051单片机的结构4 2.2 8051单片机与LED显示方法6 3 MAX+PLUS II简介7 3.1 Max+plusⅡ功能简介7 4 简易数字频率计的实现方式10 4.1 测频方案及其原理与误差分析10 4.2 等精度测频系统组成12 4.3 信号调理电路设计13 4.4 等精度测频电路的软硬件设计16 4.4.1 硬件设计16 4.4.2 软件设计19 4.5 数字频率计设计源程序20 5 结论23 致谢24 参考文献25 附录26 摘 要 本设计运用VHDL语言，采用Top To Down的方法，设计了一种8位简易的数字频率计，并利用Isp Expert集成开发环境进行编辑、综合、波形仿真，并下载到CPLD器件中，经实际电路测试，该系统系统性能可靠。主要功能有：频率测量、周期测量和脉冲宽度测量。整个设计可以分为三个部分：方案设计、软件设计、硬件设计。本文详细介绍了简易数字频率计的软件设计和硬件设计。 关键词：EDA；VHDL；数字频率计；波形仿真；CPLD Abstract The use of VHDL design language, the use of Top To Down approach, designed a simple 8-bit digital frequency meter, and the use of Isp Expert integrated development environment for editing, synthesis, simulation waveforms, and downloaded to the CPLD devices, the actual circuit test, the system reliable system performance. The main features are: the frequency of measurements, the cycle measurement and pulse width measurement. The whole design can be divided into three parts: program design, software design, hardware design. This paper describes a simple digital frequency of software design and hardware design. Key word: EDA；VHDL；digital frequency meter；Waveform Simulation；CPLD